Digital Design Diagram Creators

Descripción

<p>DATAmundi.ai is preparing for an upcoming large-scale dataset project. We expect to onboard approximately 50–100 experts within a short timeframe.</p><br/><p>To support smooth and efficient launch, we are expanding our expert pool in advance.</p><br/><p><br/></p><br/><p><span style="font-weight: bold">Who We Are Looking For</span></p><br/><p>Individuals with knowledge or studies in:</p><br/><ul><br/><li>digital systems,</li><br/><li>hardware design,</li><br/><li>digital logic and electronics,</li><br/><li>FPGA/ASIC fundamentals,</li><br/><li>HDL languages (Verilog / SystemVerilog preferred; VHDL optional)</li><br/><li>Proficiency in English sufficient to follow instructions and communicate clearly.</li><br/><li><br/></li></ul><br/><p><span style="font-weight: bold">Ideal profile:</span> recent graduates of technical fields or enthusiasts with relevant practical experience.</p><br/><p><br/></p><br/><p><span style="font-weight: bold">Project Overview</span></p><br/><p>The project involves creating a dataset of diagram images paired with one of two types of technical artefacts:</p><br/><ol><br/><li><span style="font-weight: bold">Diagram + HDL code (Verilog/SystemVerilog)</span></li><br/><li><span style="font-weight: bold">Diagram + English technical explanation of the diagram</span></li><br/></ol><br/><p>Workload distribution: <span style="font-weight: bold">50% code-based, 50% description-based</span>.</p><br/><p>The required diagram